main_f7.c 23 KB

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  1. /*
  2. * STM32F7 board support for the bootloader.
  3. *
  4. */
  5. #include "hw_config.h"
  6. #include <stdlib.h>
  7. #include <libopencm3/stm32/rcc.h>
  8. #include <libopencm3/stm32/gpio.h>
  9. #include <libopencm3/stm32/flash.h>
  10. #include <libopencm3/stm32/usart.h>
  11. #include <libopencm3/cm3/systick.h>
  12. #include <libopencm3/stm32/pwr.h>
  13. #include "bl.h"
  14. #include "uart.h"
  15. #if !defined(USART6)
  16. # define USART6 USART6_BASE
  17. #endif
  18. #if !defined(UART6)
  19. # define UART7 UART7_BASE
  20. #endif
  21. #if !defined(USART8)
  22. # define UART8 UART8_BASE
  23. #endif
  24. // A board may disable VBUS sensing, but still provide a (non-standard) VBUS
  25. // sensing pin (and use it for fast booting when USB is disconnected). If VBUS
  26. // sensing is enabled, only PA9 can be used.
  27. #ifndef BOARD_USB_VBUS_SENSE_DISABLED
  28. # define BOARD_PORT_VBUS GPIOA
  29. # define BOARD_PIN_VBUS GPIO9
  30. #endif
  31. /* flash parameters that we should not really know */
  32. static struct {
  33. uint32_t sector_number;
  34. uint32_t size;
  35. } flash_sectors[] = {
  36. /* Physical FLASH sector 0 is reserved for bootloader and is not
  37. * the table below.
  38. * N sectors may aslo be reserved for the app fw in which case
  39. * the zero based define BOARD_FIRST_FLASH_SECTOR_TO_ERASE must
  40. * be defined to begin the erase above of the reserved sectors.
  41. * The default value of BOARD_FIRST_FLASH_SECTOR_TO_ERASE is 0
  42. * and begins flash erase operations at phsical sector 1 the 0th entry
  43. * in the table below.
  44. * A value of 1 for BOARD_FIRST_FLASH_SECTOR_TO_ERASE would reserve
  45. * the 0th entry and begin erasing a index 1 the third physical sector
  46. * on the device.
  47. *
  48. * When BOARD_FIRST_FLASH_SECTOR_TO_ERASE is defined APP_RESERVATION_SIZE
  49. * must also be defined to remove that additonal reserved FLASH space
  50. * from the BOARD_FLASH_SIZE. See APP_SIZE_MAX below.
  51. */
  52. {0x01, 32 * 1024},
  53. {0x02, 32 * 1024},
  54. {0x03, 32 * 1024},
  55. {0x04, 128 * 1024},
  56. {0x05, 256 * 1024},
  57. {0x06, 256 * 1024},
  58. {0x07, 256 * 1024},
  59. {0x08, 256 * 1024},
  60. {0x09, 256 * 1024},
  61. {0x0a, 256 * 1024},
  62. {0x0b, 256 * 1024},
  63. };
  64. #define BOOTLOADER_RESERVATION_SIZE (32 * 1024)
  65. #define OTP_BASE 0x1ff0f000
  66. #define OTP_SIZE 1024
  67. #define UDID_START 0x1ff0f420
  68. // address of MCU IDCODE
  69. #define DBGMCU_IDCODE 0xE0042000
  70. #define STM32_UNKNOWN 0
  71. #define STM32F74x_75x 0x449
  72. #define STM32F76x_77x 0x451
  73. #define REVID_MASK 0xFFFF0000
  74. #define DEVID_MASK 0xFFF
  75. /* magic numbers from reference manual */
  76. typedef enum mcu_rev_e {
  77. MCU_REV_STM32F7_REV_A = 0x1000,
  78. MCU_REV_STM32F7_REV_Z = 0x1001,
  79. } mcu_rev_e;
  80. typedef struct mcu_des_t {
  81. uint16_t mcuid;
  82. const char *desc;
  83. char rev;
  84. } mcu_des_t;
  85. // The default CPU ID of STM32_UNKNOWN is 0 and is in offset 0
  86. // Before a rev is known it is set to ?
  87. // There for new silicon will result in STM32F4..,?
  88. mcu_des_t mcu_descriptions[] = {
  89. { STM32_UNKNOWN, "STM32F??????", '?'},
  90. { STM32F74x_75x, "STM32F7[4|5]x", '?'},
  91. { STM32F76x_77x, "STM32F7[6|7]x", '?'},
  92. };
  93. typedef struct mcu_rev_t {
  94. mcu_rev_e revid;
  95. char rev;
  96. } mcu_rev_t;
  97. /*
  98. * This table is used in 2 ways. One to look look up the revision
  99. * of a given chip. Two to see it a revsion is in the group of "Bad"
  100. * silicon.
  101. *
  102. * Therefore when adding entries for good silicon rev, they must be inserted
  103. * at the beginning of the table. The value of FIRST_BAD_SILICON_OFFSET will
  104. * also need to be increased to that of the value of the first bad silicon offset.
  105. *
  106. */
  107. const mcu_rev_t silicon_revs[] = {
  108. {MCU_REV_STM32F7_REV_A, 'A'}, /* Revision A */
  109. {MCU_REV_STM32F7_REV_Z, 'Z'}, /* Revision Z */
  110. };
  111. #define APP_SIZE_MAX (BOARD_FLASH_SIZE - (BOOTLOADER_RESERVATION_SIZE + APP_RESERVATION_SIZE))
  112. /* context passed to cinit */
  113. #if INTERFACE_USART
  114. # define BOARD_INTERFACE_CONFIG_USART (void *)BOARD_USART
  115. #endif
  116. #if INTERFACE_USB
  117. # define BOARD_INTERFACE_CONFIG_USB NULL
  118. #endif
  119. /* board definition */
  120. struct boardinfo board_info = {
  121. .board_type = BOARD_TYPE,
  122. .board_rev = 0,
  123. .fw_size = 0,
  124. .systick_mhz = 168,
  125. };
  126. static void board_init(void);
  127. #define BOOT_RTC_SIGNATURE 0xb007b007
  128. #define POWER_DOWN_RTC_SIGNATURE 0xdeaddead // Written by app fw to not re-power on.
  129. #define BOOT_RTC_REG MMIO32(RTC_BASE + 0x50)
  130. /* standard clocking for all F7 boards: 216MHz w/ overdrive
  131. *
  132. * f_vco = f_osc * (PLLN / PLLM) = OSC_FREQ * PLLN / OSC_FREQ = PLLN = 432
  133. * f_pll = f_vco / PLLP = PLLN / PLLP = 216
  134. * f_usb_sdmmc = f_vco / PLLQ = 48
  135. */
  136. static const struct rcc_clock_scale clock_setup = {
  137. /* 216MHz */
  138. .plln = 432,
  139. .pllp = 2,
  140. .pllq = 9,
  141. .flash_waitstates = 7,
  142. .hpre = RCC_CFGR_HPRE_DIV_NONE,
  143. .ppre1 = RCC_CFGR_PPRE_DIV_4,
  144. .ppre2 = RCC_CFGR_PPRE_DIV_2,
  145. .vos_scale = PWR_SCALE1, /** <= 180MHz w/o overdrive, <= 216MHz w/ overdrive */
  146. .overdrive = 1,
  147. .apb1_frequency = 54000000,
  148. .apb2_frequency = 108000000,
  149. };
  150. /* State of an inserted USB cable */
  151. static bool usb_connected = false;
  152. static uint32_t
  153. board_get_rtc_signature()
  154. {
  155. /* enable the backup registers */
  156. PWR_CR1 |= PWR_CR1_DBP;
  157. RCC_BDCR |= RCC_BDCR_RTCEN;
  158. uint32_t result = BOOT_RTC_REG;
  159. /* disable the backup registers */
  160. RCC_BDCR &= RCC_BDCR_RTCEN;
  161. PWR_CR1 &= ~PWR_CR1_DBP;
  162. return result;
  163. }
  164. static void
  165. board_set_rtc_signature(uint32_t sig)
  166. {
  167. /* enable the backup registers */
  168. PWR_CR1 |= PWR_CR1_DBP;
  169. RCC_BDCR |= RCC_BDCR_RTCEN;
  170. BOOT_RTC_REG = sig;
  171. /* disable the backup registers */
  172. RCC_BDCR &= RCC_BDCR_RTCEN;
  173. PWR_CR1 &= ~PWR_CR1_DBP;
  174. }
  175. static bool
  176. board_test_force_pin()
  177. {
  178. #if defined(BOARD_FORCE_BL_PIN_IN) && defined(BOARD_FORCE_BL_PIN_OUT)
  179. /* two pins strapped together */
  180. volatile unsigned samples = 0;
  181. volatile unsigned vote = 0;
  182. for (volatile unsigned cycles = 0; cycles < 10; cycles++) {
  183. gpio_set(BOARD_FORCE_BL_PORT, BOARD_FORCE_BL_PIN_OUT);
  184. for (unsigned count = 0; count < 20; count++) {
  185. if (gpio_get(BOARD_FORCE_BL_PORT, BOARD_FORCE_BL_PIN_IN) != 0) {
  186. vote++;
  187. }
  188. samples++;
  189. }
  190. gpio_clear(BOARD_FORCE_BL_PORT, BOARD_FORCE_BL_PIN_OUT);
  191. for (unsigned count = 0; count < 20; count++) {
  192. if (gpio_get(BOARD_FORCE_BL_PORT, BOARD_FORCE_BL_PIN_IN) == 0) {
  193. vote++;
  194. }
  195. samples++;
  196. }
  197. }
  198. /* the idea here is to reject wire-to-wire coupling, so require > 90% agreement */
  199. if ((vote * 100) > (samples * 90)) {
  200. return true;
  201. }
  202. #endif
  203. #if defined(BOARD_FORCE_BL_PIN)
  204. /* single pin pulled up or down */
  205. volatile unsigned samples = 0;
  206. volatile unsigned vote = 0;
  207. for (samples = 0; samples < 200; samples++) {
  208. if ((gpio_get(BOARD_FORCE_BL_PORT, BOARD_FORCE_BL_PIN) ? 1 : 0) == BOARD_FORCE_BL_STATE) {
  209. vote++;
  210. }
  211. }
  212. /* reject a little noise */
  213. if ((vote * 100) > (samples * 90)) {
  214. return true;
  215. }
  216. #endif
  217. return false;
  218. }
  219. #if INTERFACE_USART
  220. static bool
  221. board_test_usart_receiving_break()
  222. {
  223. #if !defined(SERIAL_BREAK_DETECT_DISABLED)
  224. /* (re)start the SysTick timer system */
  225. systick_interrupt_disable(); // Kill the interrupt if it is still active
  226. systick_counter_disable(); // Stop the timer
  227. systick_set_clocksource(STK_CSR_CLKSOURCE_AHB);
  228. /* Set the timer period to be half the bit rate
  229. *
  230. * Baud rate = 115200, therefore bit period = 8.68us
  231. * Half the bit rate = 4.34us
  232. * Set period to 4.34 microseconds (timer_period = timer_tick / timer_reset_frequency = 168MHz / (1/4.34us) = 729.12 ~= 729)
  233. */
  234. systick_set_reload(729); /* 4.3us tick, magic number */
  235. systick_counter_enable(); // Start the timer
  236. uint8_t cnt_consecutive_low = 0;
  237. uint8_t cnt = 0;
  238. /* Loop for 3 transmission byte cycles and count the low and high bits. Sampled at a rate to be able to count each bit twice.
  239. *
  240. * One transmission byte is 10 bits (8 bytes of data + 1 start bit + 1 stop bit)
  241. * We sample at every half bit time, therefore 20 samples per transmission byte,
  242. * therefore 60 samples for 3 transmission bytes
  243. */
  244. while (cnt < 60) {
  245. // Only read pin when SysTick timer is true
  246. if (systick_get_countflag() == 1) {
  247. if (gpio_get(BOARD_PORT_USART_RX, BOARD_PIN_RX) == 0) {
  248. cnt_consecutive_low++; // Increment the consecutive low counter
  249. } else {
  250. cnt_consecutive_low = 0; // Reset the consecutive low counter
  251. }
  252. cnt++;
  253. }
  254. // If 9 consecutive low bits were received break out of the loop
  255. if (cnt_consecutive_low >= 18) {
  256. break;
  257. }
  258. }
  259. systick_counter_disable(); // Stop the timer
  260. /*
  261. * If a break is detected, return true, else false
  262. *
  263. * Break is detected if line was low for 9 consecutive bits.
  264. */
  265. if (cnt_consecutive_low >= 18) {
  266. return true;
  267. }
  268. #endif // !defined(SERIAL_BREAK_DETECT_DISABLED)
  269. return false;
  270. }
  271. #endif
  272. uint32_t
  273. board_get_devices(void)
  274. {
  275. uint32_t devices = BOOT_DEVICES_SELECTION;
  276. if (usb_connected) {
  277. devices &= BOOT_DEVICES_FILTER_ONUSB;
  278. }
  279. return devices;
  280. }
  281. static void
  282. board_init(void)
  283. {
  284. /* fix up the max firmware size, we have to read memory to get this */
  285. board_info.fw_size = APP_SIZE_MAX;
  286. #if defined(BOARD_POWER_PIN_OUT)
  287. /* Configure the Power pins */
  288. rcc_peripheral_enable_clock(&BOARD_POWER_CLOCK_REGISTER, BOARD_POWER_CLOCK_BIT);
  289. gpio_mode_setup(BOARD_POWER_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, BOARD_POWER_PIN_OUT);
  290. gpio_set_output_options(BOARD_POWER_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_2MHZ, BOARD_POWER_PIN_OUT);
  291. BOARD_POWER_ON(BOARD_POWER_PORT, BOARD_POWER_PIN_OUT);
  292. #endif
  293. #if INTERFACE_USB
  294. #if !defined(BOARD_USB_VBUS_SENSE_DISABLED)
  295. /* enable configured GPIO to sample VBUS */
  296. rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_GPIOAEN);
  297. # if defined(USE_VBUS_PULL_DOWN)
  298. gpio_mode_setup(GPIOA, GPIO_MODE_INPUT, GPIO_PUPD_PULLDOWN, GPIO9);
  299. # endif
  300. #endif
  301. #endif
  302. #if INTERFACE_USART
  303. /* configure USART pins */
  304. rcc_peripheral_enable_clock(&BOARD_USART_PIN_CLOCK_REGISTER, BOARD_USART_PIN_CLOCK_BIT_TX);
  305. rcc_peripheral_enable_clock(&BOARD_USART_PIN_CLOCK_REGISTER, BOARD_USART_PIN_CLOCK_BIT_RX);
  306. /* Setup GPIO pins for USART transmit. */
  307. gpio_mode_setup(BOARD_PORT_USART_TX, GPIO_MODE_AF, GPIO_PUPD_PULLUP, BOARD_PIN_TX);
  308. gpio_mode_setup(BOARD_PORT_USART_RX, GPIO_MODE_AF, GPIO_PUPD_PULLUP, BOARD_PIN_RX);
  309. /* Setup USART TX & RX pins as alternate function. */
  310. gpio_set_af(BOARD_PORT_USART_TX, BOARD_PORT_USART_AF, BOARD_PIN_TX);
  311. gpio_set_af(BOARD_PORT_USART_RX, BOARD_PORT_USART_AF, BOARD_PIN_RX);
  312. /* configure USART clock */
  313. rcc_peripheral_enable_clock(&BOARD_USART_CLOCK_REGISTER, BOARD_USART_CLOCK_BIT);
  314. #endif
  315. #if defined(BOARD_FORCE_BL_PIN_IN) && defined(BOARD_FORCE_BL_PIN_OUT)
  316. /* configure the force BL pins */
  317. rcc_peripheral_enable_clock(&BOARD_FORCE_BL_CLOCK_REGISTER, BOARD_FORCE_BL_CLOCK_BIT);
  318. gpio_mode_setup(BOARD_FORCE_BL_PORT, GPIO_MODE_INPUT, BOARD_FORCE_BL_PULL, BOARD_FORCE_BL_PIN_IN);
  319. gpio_mode_setup(BOARD_FORCE_BL_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, BOARD_FORCE_BL_PIN_OUT);
  320. gpio_set_output_options(BOARD_FORCE_BL_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_100MHZ, BOARD_FORCE_BL_PIN_OUT);
  321. #endif
  322. #if defined(BOARD_FORCE_BL_PIN)
  323. /* configure the force BL pins */
  324. rcc_peripheral_enable_clock(&BOARD_FORCE_BL_CLOCK_REGISTER, BOARD_FORCE_BL_CLOCK_BIT);
  325. gpio_mode_setup(BOARD_FORCE_BL_PORT, GPIO_MODE_INPUT, BOARD_FORCE_BL_PULL, BOARD_FORCE_BL_PIN);
  326. #endif
  327. #if defined(BOARD_CLOCK_LEDS)
  328. /* initialise LEDs */
  329. rcc_peripheral_enable_clock(&RCC_AHB1ENR, BOARD_CLOCK_LEDS);
  330. gpio_mode_setup(
  331. BOARD_PORT_LEDS,
  332. GPIO_MODE_OUTPUT,
  333. GPIO_PUPD_NONE,
  334. BOARD_PIN_LED_BOOTLOADER | BOARD_PIN_LED_ACTIVITY);
  335. gpio_set_output_options(
  336. BOARD_PORT_LEDS,
  337. GPIO_OTYPE_PP,
  338. GPIO_OSPEED_2MHZ,
  339. BOARD_PIN_LED_BOOTLOADER | BOARD_PIN_LED_ACTIVITY);
  340. BOARD_LED_ON(
  341. BOARD_PORT_LEDS,
  342. BOARD_PIN_LED_BOOTLOADER | BOARD_PIN_LED_ACTIVITY);
  343. #endif
  344. /* enable the power controller clock */
  345. rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_PWREN);
  346. }
  347. void
  348. board_deinit(void)
  349. {
  350. #if INTERFACE_USART
  351. /* deinitialise GPIO pins for USART transmit. */
  352. gpio_mode_setup(BOARD_PORT_USART_TX, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BOARD_PIN_TX);
  353. gpio_mode_setup(BOARD_PORT_USART_RX, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BOARD_PIN_RX);
  354. /* disable USART peripheral clock */
  355. rcc_peripheral_disable_clock(&BOARD_USART_CLOCK_REGISTER, BOARD_USART_CLOCK_BIT);
  356. #endif
  357. #if defined(BOARD_FORCE_BL_PIN_IN) && defined(BOARD_FORCE_BL_PIN_OUT)
  358. /* deinitialise the force BL pins */
  359. gpio_mode_setup(BOARD_FORCE_BL_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BOARD_FORCE_BL_PIN_OUT);
  360. gpio_mode_setup(BOARD_FORCE_BL_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BOARD_FORCE_BL_PIN_IN);
  361. #endif
  362. #if defined(BOARD_FORCE_BL_PIN)
  363. /* deinitialise the force BL pin */
  364. gpio_mode_setup(BOARD_FORCE_BL_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BOARD_FORCE_BL_PIN);
  365. #endif
  366. #if defined(BOARD_POWER_PIN_OUT) && defined(BOARD_POWER_PIN_RELEASE)
  367. /* deinitialize the POWER pin - with the assumption the hold up time of
  368. * the voltage being bleed off by an inupt pin impedance will allow
  369. * enough time to boot the app
  370. */
  371. gpio_mode_setup(BOARD_POWER_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BOARD_POWER_PIN);
  372. #endif
  373. #if defined(BOARD_CLOCK_LEDS)
  374. /* deinitialise LEDs */
  375. gpio_mode_setup(
  376. BOARD_PORT_LEDS,
  377. GPIO_MODE_INPUT,
  378. GPIO_PUPD_NONE,
  379. BOARD_PIN_LED_BOOTLOADER | BOARD_PIN_LED_ACTIVITY);
  380. #endif
  381. /* disable the power controller clock */
  382. rcc_peripheral_disable_clock(&RCC_APB1ENR, RCC_APB1ENR_PWREN);
  383. /* disable the AHB peripheral clocks */
  384. RCC_AHB1ENR = 0x00100000; // XXX Magic reset number from STM32F4x reference manual
  385. }
  386. /**
  387. * @brief Initializes the RCC clock configuration.
  388. *
  389. * @param clock_setup : The clock configuration to set
  390. */
  391. static inline void
  392. clock_init(void)
  393. {
  394. rcc_clock_setup_hse(&clock_setup, OSC_FREQ);
  395. }
  396. /**
  397. * @brief Resets the RCC clock configuration to the default reset state.
  398. * @note The default reset state of the clock configuration is given below:
  399. * - HSI ON and used as system clock source
  400. * - HSE, PLL and PLLI2S OFF
  401. * - AHB, APB1 and APB2 prescaler set to 1.
  402. * - CSS, MCO1 and MCO2 OFF
  403. * - All interrupts disabled
  404. * @note This function doesn't modify the configuration of the
  405. * - Peripheral clocks
  406. * - LSI, LSE and RTC clocks
  407. */
  408. void
  409. clock_deinit(void)
  410. {
  411. /* Enable internal high-speed oscillator. */
  412. rcc_osc_on(RCC_HSI);
  413. rcc_wait_for_osc_ready(RCC_HSI);
  414. /* Reset the RCC_CFGR register */
  415. RCC_CFGR = 0x000000;
  416. /* Stop the HSE, CSS, PLL, PLLI2S, PLLSAI */
  417. rcc_osc_off(RCC_HSE);
  418. rcc_osc_off(RCC_PLL);
  419. rcc_css_disable();
  420. /* Reset the RCC_PLLCFGR register */
  421. RCC_PLLCFGR = 0x24003010; // XXX Magic reset number from STM32F4xx reference manual
  422. /* Reset the HSEBYP bit */
  423. rcc_osc_bypass_disable(RCC_HSE);
  424. /* Reset the CIR register */
  425. RCC_CIR = 0x000000;
  426. }
  427. uint32_t
  428. flash_func_sector_size(unsigned sector)
  429. {
  430. if (sector < BOARD_FLASH_SECTORS) {
  431. return flash_sectors[sector].size;
  432. }
  433. return 0;
  434. }
  435. void
  436. flash_func_erase_sector(unsigned sector)
  437. {
  438. if (sector >= BOARD_FLASH_SECTORS || sector < BOARD_FIRST_FLASH_SECTOR_TO_ERASE) {
  439. return;
  440. }
  441. /* Caculate the logical base address of the sector
  442. * flash_func_read_word will add APP_LOAD_ADDRESS
  443. */
  444. uint32_t address = 0;
  445. for (unsigned i = BOARD_FIRST_FLASH_SECTOR_TO_ERASE; i < sector; i++) {
  446. address += flash_func_sector_size(i);
  447. }
  448. /* blank-check the sector */
  449. unsigned size = flash_func_sector_size(sector);
  450. bool blank = true;
  451. for (unsigned i = 0; i < size; i += sizeof(uint32_t)) {
  452. if (flash_func_read_word(address + i) != 0xffffffff) {
  453. blank = false;
  454. break;
  455. }
  456. }
  457. /* erase the sector if it failed the blank check */
  458. if (!blank) {
  459. flash_erase_sector(flash_sectors[sector].sector_number, FLASH_CR_PROGRAM_X32);
  460. }
  461. }
  462. void
  463. flash_func_write_word(uint32_t address, uint32_t word)
  464. {
  465. address += APP_LOAD_ADDRESS;
  466. /* Ensure that all flash operations are complete. */
  467. flash_wait_for_last_operation();
  468. /* Program the 32bits. */
  469. FLASH_CR &= ~(FLASH_CR_PROGRAM_MASK << FLASH_CR_PROGRAM_SHIFT);
  470. FLASH_CR |= FLASH_CR_PROGRAM_X32 << FLASH_CR_PROGRAM_SHIFT;
  471. /* Enable writes to flash. */
  472. FLASH_CR |= FLASH_CR_PG;
  473. /* Program the word. */
  474. MMIO32(address) = word;
  475. /* Use DSB to complete write etal above. So that wait is not skipped */
  476. __asm__ volatile("DSB \n");
  477. flash_wait_for_last_operation();
  478. /* Disable writes to flash. */
  479. FLASH_CR &= ~FLASH_CR_PG;
  480. }
  481. uint32_t
  482. flash_func_read_word(uint32_t address)
  483. {
  484. if (address & 3) {
  485. return 0;
  486. }
  487. return *(uint32_t *)(address + APP_LOAD_ADDRESS);
  488. }
  489. uint32_t
  490. flash_func_read_otp(uint32_t address)
  491. {
  492. if (address & 3) {
  493. return 0;
  494. }
  495. if (address > OTP_SIZE) {
  496. return 0;
  497. }
  498. return *(uint32_t *)(address + OTP_BASE);
  499. }
  500. uint32_t get_mcu_id(void)
  501. {
  502. return *(uint32_t *)DBGMCU_IDCODE;
  503. }
  504. int get_mcu_desc(int max, uint8_t *revstr)
  505. {
  506. uint32_t idcode = (*(uint32_t *)DBGMCU_IDCODE);
  507. int32_t mcuid = idcode & DEVID_MASK;
  508. mcu_rev_e revid = (idcode & REVID_MASK) >> 16;
  509. mcu_des_t des = mcu_descriptions[STM32_UNKNOWN];
  510. for (int i = 0; i < arraySize(mcu_descriptions); i++) {
  511. if (mcuid == mcu_descriptions[i].mcuid) {
  512. des = mcu_descriptions[i];
  513. break;
  514. }
  515. }
  516. for (int i = 0; i < arraySize(silicon_revs); i++) {
  517. if (silicon_revs[i].revid == revid) {
  518. des.rev = silicon_revs[i].rev;
  519. }
  520. }
  521. uint8_t *endp = &revstr[max - 1];
  522. uint8_t *strp = revstr;
  523. while (strp < endp && *des.desc) {
  524. *strp++ = *des.desc++;
  525. }
  526. if (strp < endp) {
  527. *strp++ = ',';
  528. }
  529. if (strp < endp) {
  530. *strp++ = des.rev;
  531. }
  532. return strp - revstr;
  533. }
  534. int check_silicon(void)
  535. {
  536. return 0;
  537. }
  538. uint32_t
  539. flash_func_read_sn(uint32_t address)
  540. {
  541. // read a byte out from unique chip ID area
  542. // it's 12 bytes, or 3 words.
  543. return *(uint32_t *)(address + UDID_START);
  544. }
  545. void
  546. led_on(unsigned led)
  547. {
  548. switch (led) {
  549. case LED_ACTIVITY:
  550. #if defined(BOARD_PIN_LED_ACTIVITY)
  551. BOARD_LED_ON(BOARD_PORT_LEDS, BOARD_PIN_LED_ACTIVITY);
  552. #endif
  553. break;
  554. case LED_BOOTLOADER:
  555. #if defined(BOARD_PIN_LED_BOOTLOADER)
  556. BOARD_LED_ON(BOARD_PORT_LEDS, BOARD_PIN_LED_BOOTLOADER);
  557. #endif
  558. break;
  559. }
  560. }
  561. void
  562. led_off(unsigned led)
  563. {
  564. switch (led) {
  565. case LED_ACTIVITY:
  566. #if defined(BOARD_PIN_LED_ACTIVITY)
  567. BOARD_LED_OFF(BOARD_PORT_LEDS, BOARD_PIN_LED_ACTIVITY);
  568. #endif
  569. break;
  570. case LED_BOOTLOADER:
  571. #if defined(BOARD_PIN_LED_BOOTLOADER)
  572. BOARD_LED_OFF(BOARD_PORT_LEDS, BOARD_PIN_LED_BOOTLOADER);
  573. #endif
  574. break;
  575. }
  576. }
  577. void
  578. led_toggle(unsigned led)
  579. {
  580. switch (led) {
  581. case LED_ACTIVITY:
  582. #if defined(BOARD_PIN_LED_ACTIVITY)
  583. gpio_toggle(BOARD_PORT_LEDS, BOARD_PIN_LED_ACTIVITY);
  584. #endif
  585. break;
  586. case LED_BOOTLOADER:
  587. #if defined(BOARD_PIN_LED_BOOTLOADER)
  588. gpio_toggle(BOARD_PORT_LEDS, BOARD_PIN_LED_BOOTLOADER);
  589. #endif
  590. break;
  591. }
  592. }
  593. /* we should know this, but we don't */
  594. #ifndef SCB_CPACR
  595. # define SCB_CPACR (*((volatile uint32_t *) (((0xE000E000UL) + 0x0D00UL) + 0x088)))
  596. #endif
  597. int
  598. main(void)
  599. {
  600. bool try_boot = true; /* try booting before we drop to the bootloader */
  601. unsigned timeout = BOOTLOADER_DELAY; /* if nonzero, drop out of the bootloader after this time */
  602. /* Enable the FPU before we hit any FP instructions */
  603. SCB_CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 Full Access and set CP11 Full Access */
  604. #if defined(BOARD_POWER_PIN_OUT)
  605. /* Here we check for the app setting the POWER_DOWN_RTC_SIGNATURE
  606. * in this case, we reset the signature and wait to die
  607. */
  608. if (board_get_rtc_signature() == POWER_DOWN_RTC_SIGNATURE) {
  609. board_set_rtc_signature(0);
  610. while (1);
  611. }
  612. #endif
  613. /* do board-specific initialisation */
  614. board_init();
  615. /* configure the clock for bootloader activity */
  616. clock_init();
  617. /*
  618. * Check the force-bootloader register; if we find the signature there, don't
  619. * try booting.
  620. */
  621. if (board_get_rtc_signature() == BOOT_RTC_SIGNATURE) {
  622. /*
  623. * Don't even try to boot before dropping to the bootloader.
  624. */
  625. try_boot = false;
  626. /*
  627. * Don't drop out of the bootloader until something has been uploaded.
  628. */
  629. timeout = 0;
  630. /*
  631. * Clear the signature so that if someone resets us while we're
  632. * in the bootloader we'll try to boot next time.
  633. */
  634. board_set_rtc_signature(0);
  635. }
  636. #ifdef BOOT_DELAY_ADDRESS
  637. {
  638. /*
  639. if a boot delay signature is present then delay the boot
  640. by at least that amount of time in seconds. This allows
  641. for an opportunity for a companion computer to load a
  642. new firmware, while still booting fast by sending a BOOT
  643. command
  644. */
  645. uint32_t sig1 = flash_func_read_word(BOOT_DELAY_ADDRESS);
  646. uint32_t sig2 = flash_func_read_word(BOOT_DELAY_ADDRESS + 4);
  647. if (sig2 == BOOT_DELAY_SIGNATURE2 &&
  648. (sig1 & 0xFFFFFF00) == (BOOT_DELAY_SIGNATURE1 & 0xFFFFFF00)) {
  649. unsigned boot_delay = sig1 & 0xFF;
  650. if (boot_delay <= BOOT_DELAY_MAX) {
  651. try_boot = false;
  652. if (timeout < boot_delay * 1000) {
  653. timeout = boot_delay * 1000;
  654. }
  655. }
  656. }
  657. }
  658. #endif
  659. /*
  660. * Check if the force-bootloader pins are strapped; if strapped,
  661. * don't try booting.
  662. */
  663. if (board_test_force_pin()) {
  664. try_boot = false;
  665. }
  666. #if INTERFACE_USB
  667. /*
  668. * Check for USB connection - if present, don't try to boot, but set a timeout after
  669. * which we will fall out of the bootloader.
  670. *
  671. * If the force-bootloader pins are tied, we will stay here until they are removed and
  672. * we then time out.
  673. */
  674. #if defined(BOARD_PORT_VBUS)
  675. if (gpio_get(BOARD_PORT_VBUS, BOARD_PIN_VBUS) != 0) {
  676. usb_connected = true;
  677. /* don't try booting before we set up the bootloader */
  678. try_boot = false;
  679. }
  680. #else
  681. try_boot = false;
  682. #endif
  683. #endif
  684. #if INTERFACE_USART
  685. /*
  686. * Check for if the USART port RX line is receiving a break command, or is being held low. If yes,
  687. * don't try to boot, but set a timeout after
  688. * which we will fall out of the bootloader.
  689. *
  690. * If the force-bootloader pins are tied, we will stay here until they are removed and
  691. * we then time out.
  692. */
  693. if (board_test_usart_receiving_break()) {
  694. try_boot = false;
  695. }
  696. #endif
  697. /* Try to boot the app if we think we should just go straight there */
  698. if (try_boot) {
  699. /* set the boot-to-bootloader flag so that if boot fails on reset we will stop here */
  700. #ifdef BOARD_BOOT_FAIL_DETECT
  701. board_set_rtc_signature(BOOT_RTC_SIGNATURE);
  702. #endif
  703. /* try to boot immediately */
  704. jump_to_app();
  705. // If it failed to boot, reset the boot signature and stay in bootloader
  706. board_set_rtc_signature(BOOT_RTC_SIGNATURE);
  707. /* booting failed, stay in the bootloader forever */
  708. timeout = 0;
  709. }
  710. /* start the interface */
  711. #if INTERFACE_USART
  712. cinit(BOARD_INTERFACE_CONFIG_USART, USART);
  713. #endif
  714. #if INTERFACE_USB
  715. cinit(BOARD_INTERFACE_CONFIG_USB, USB);
  716. #endif
  717. #if 0
  718. // MCO1/02
  719. gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO8);
  720. gpio_set_output_options(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_100MHZ, GPIO8);
  721. gpio_set_af(GPIOA, GPIO_AF0, GPIO8);
  722. gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9);
  723. gpio_set_af(GPIOC, GPIO_AF0, GPIO9);
  724. #endif
  725. while (1) {
  726. /* run the bootloader, come back after an app is uploaded or we time out */
  727. bootloader(timeout);
  728. /* if the force-bootloader pins are strapped, just loop back */
  729. if (board_test_force_pin()) {
  730. continue;
  731. }
  732. #if INTERFACE_USART
  733. /* if the USART port RX line is still receiving a break, just loop back */
  734. if (board_test_usart_receiving_break()) {
  735. continue;
  736. }
  737. #endif
  738. /* set the boot-to-bootloader flag so that if boot fails on reset we will stop here */
  739. #ifdef BOARD_BOOT_FAIL_DETECT
  740. board_set_rtc_signature(BOOT_RTC_SIGNATURE);
  741. #endif
  742. /* look to see if we can boot the app */
  743. jump_to_app();
  744. /* launching the app failed - stay in the bootloader forever */
  745. timeout = 0;
  746. }
  747. }