pcf8833.h 7.9 KB

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  1. /****************************************************************************
  2. * drivers/lcd/pcf8833.h
  3. *
  4. * Licensed to the Apache Software Foundation (ASF) under one or more
  5. * contributor license agreements. See the NOTICE file distributed with
  6. * this work for additional information regarding copyright ownership. The
  7. * ASF licenses this file to you under the Apache License, Version 2.0 (the
  8. * "License"); you may not use this file except in compliance with the
  9. * License. You may obtain a copy of the License at
  10. *
  11. * http://www.apache.org/licenses/LICENSE-2.0
  12. *
  13. * Unless required by applicable law or agreed to in writing, software
  14. * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
  15. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
  16. * License for the specific language governing permissions and limitations
  17. * under the License.
  18. *
  19. ****************************************************************************/
  20. /* Definitions for the Phillips PCF8833 LCD controller
  21. *
  22. * References:
  23. * "Data Sheet, PCF8833 STN RGB 132x132x3 driver," Phillips, 2003 Feb 14.
  24. */
  25. #ifndef __DRIVERS_LCD_PCF8833_H
  26. #define __DRIVERS_LCD_PCF8833_H
  27. /****************************************************************************
  28. * Included Files
  29. ****************************************************************************/
  30. /****************************************************************************
  31. * Pre-processor Definitions
  32. ****************************************************************************/
  33. /* Pixel format codes */
  34. #define PCF8833_FMT_8BPS (2)
  35. #define PCF8833_FMT_12BPS (3)
  36. #define PCF8833_FMT_16BPS (5)
  37. /* LCD Commands */
  38. #define PCF8833_NOP 0x00 /* No operation; Data: none */
  39. #define PCF8833_SWRESET 0x01 /* Software reset ; Data: none */
  40. #define PCF8833_BSTROFF 0x02 /* Booster voltage off; Data: none */
  41. #define PCF8833_BSTRON 0x03 /* Booster voltage on; Data: none */
  42. #define PCF8833_RDDIDIF 0x04 /* Read display identification; Data: none */
  43. #define PCF8833_RDDST 0x09 /* Read display status; Data: none */
  44. #define PCF8833_SLEEPIN 0x10 /* Sleep_IN; Data: none */
  45. #define PCF8833_SLEEPOUT 0x11 /* Sleep_OUT; Data: none */
  46. #define PCF8833_PTLON 0x12 /* Partial mode on; Data: none */
  47. #define PCF8833_NORON 0x13 /* Normal Display mode on; Data: none */
  48. #define PCF8833_INVOFF 0x20 /* Display inversion off; Data: none */
  49. #define PCF8833_INVON 0x21 /* Display inversion on; Data: none */
  50. #define PCF8833_DALO 0x22 /* All pixel off; Data: none */
  51. #define PCF8833_DAL 0x23 /* All pixel on; Data: none */
  52. #define PCF8833_SETCON 0x25 /* Set contrast; Data: (1) contrast */
  53. #define PCF8833_DISPOFF 0x28 /* Display off; Data: none */
  54. #define PCF8833_DISPON 0x29 /* Display on; Data: none */
  55. #define PCF8833_CASET 0x2a /* Column address set; Data: (1) X start (2) X end */
  56. #define PCF8833_PASET 0x2b /* Page address set Data: (1) Y start (2) Y end */
  57. #define PCF8833_RAMWR 0x2c /* Memory write; Data: (1) write data */
  58. #define PCF8833_RGBSET 0x2d /* Colour set; Data: (1-8) red tones, (9-16) green tones, (17-20) blue tones */
  59. #define PCF8833_PTLAR 0x30 /* Partial area; Data: (1) start address (2) end address */
  60. #define PCF8833_VSCRDEF 0x33 /* Vertical scroll definition; Data: (1) top fixed, (2) scrol area, (3) bottom fixed */
  61. #define PCF8833_TEOFF 0x34 /* Tearing line off; Data: none */
  62. #define PCF8833_TEON 0x35 /* Tearing line on; Data: (1) don't care */
  63. #define PCF8833_MADCTL 0x36 /* Memory data access control; Data: (1) access control settings */
  64. #define PCF8833_SEP 0x37 /* Set Scroll Entry Point; Data: (1) scroll entry point */
  65. #define PCF8833_IDMOFF 0x38 /* Idle mode off; Data: none */
  66. #define PCF8833_IDMON 0x39 /* Idle mode on; Data: none */
  67. #define PCF8833_COLMOD 0x3a /* Interface pixel format; Data: (1) color interface format */
  68. #define PCF8833_SETVOP 0xb0 /* Set VOP; Data: (1) VOP5-8 (2) VOP0-4 */
  69. #define PCF8833_BRS 0xb4 /* Bottom Row Swap; Data: none */
  70. #define PCF8833_TRS 0xb6 /* Top Row Swap; Data: none */
  71. #define PCF8833_FINV 0xb9 /* Super Frame INVersion; Data: none */
  72. #define PCF8833_DOR 0xba /* Data ORder; Data: none */
  73. #define PCF8833_TCDFE 0xbd /* Enable/disable DF temp comp; Data: none */
  74. #define PCF8833_TCVOPE 0xbf /* Enable or disable VOP temp comp; Data: none */
  75. #define PCF8833_EC 0xc0 /* Internal or external oscillator; Data: none */
  76. #define PCF8833_SETMUL 0xc2 /* Set multiplication factor; Data: (1) Multiplication factor */
  77. #define PCF8833_TCVOPAB 0xc3 /* Set TCVOP slopes A and B; Data: (1) SLB and SLA */
  78. #define PCF8833_TCVOPCD 0xc4 /* Set TCVOP slopes C and D; Data: (1) SLD and SLC */
  79. #define PCF8833_TCDF 0xc5 /* Set divider frequency; Data: Divider factor in region (1) A (2) B (3) C (4) D */
  80. #define PCF8833_DF8COLOR 0xc6 /* Set divider frequency 8-colour mode; Data: (1) DF80-6 */
  81. #define PCF8833_SETBS 0xc7 /* Set bias system; Data: (1) Bias systems */
  82. #define PCF8833_RDTEMP 0xc8 /* Temperature read back; Data: none */
  83. #define PCF8833_NLI 0xc9 /* N-Line Inversion; Data: (1) NLI time slots invervsion */
  84. #define PCF8833_RDID1 0xda /* Read ID1; Data: none */
  85. #define PCF8833_RDID2 0xdb /* Read ID2; Data: none */
  86. #define PCF8833_RDID3 0xdc /* Read ID3; Data: none */
  87. #define PCF8833_SFD 0xef /* Select factory defaults; Data: none */
  88. #define PCF8833_ECM 0xf0 /* Enter Calibration mode; Data: (1) Calibration control settings */
  89. #define PCF8833_OTPSHTIN 0xf1 /* Shift data in OTP shift registers; Data: Any number of bytes */
  90. /* Memory data access control (MADCTL) bit definitions */
  91. #define MADCTL_RGB (1 << 3) /* Bit 3: BGR */
  92. #define MADCTL_LAO (1 << 4) /* Bit 4: Line address order bottom to top */
  93. #define MADCTL_V (1 << 5) /* Bit 5: Vertical RAM write; in Y direction */
  94. #define MADCTL_MX (1 << 6) /* Bit 6: Mirror X */
  95. #define MADCTL_MY (1 << 7) /* Bit 7: Mirror Y */
  96. /* PCF8833 status register bit definitions */
  97. /* CMD format: RDDST command followed by four status bytes: */
  98. /* Byte 1: D31 d30 D29 D28 D27 D26 --- --- */
  99. #define PCF8833_ST_RGB (1 << 2) /* Bit 2: D26 - RGB/BGR order */
  100. #define PCF8833_ST_LINEADDR (1 << 3) /* Bit 3: D27 - Line address order */
  101. #define PCF8833_ST_ADDRMODE (1 << 4) /* Bit 4: D28 - Vertical/horizontal addressing mode */
  102. #define PCF8833_ST_XADDR (1 << 5) /* Bit 5: D29 - X address order */
  103. #define PCF8833_ST_YADDR (1 << 6) /* Bit 6: D30 - Y address order */
  104. #define PCF8833_ST_BOOSTER (1 << 7) /* Bit 7: D31 - Booster voltage status */
  105. /* Byte 2: --- D22 D21 D20 D19 D18 D17 D16 */
  106. #define PCF8833_ST_NORMAL (1 << 0) /* Bit 0: D16 - Normal display mode */
  107. #define PCF8833_ST_SLEEPIN (1 << 1) /* Bit 1: D17 - Sleep in selected */
  108. #define PCF8833_ST_PARTIAL (1 << 2) /* Bit 2: D18 - Partial mode on */
  109. #define PCF8833_ST_IDLE (1 << 3) /* Bit 3: D19 - Idle mode selected */
  110. #define PCF8833_ST_PIXELFMT_SHIFT (4) /* Bits 4-6: D20-D22 - Interface pixel format */
  111. #define PCF8833_ST_PIXELFMT_MASK (7 << PCF8833_ST_PIXELFMT_SHIFT)
  112. # define PCF8833_ST_PIXELFMT_8BPS (PCF8833_FMT_8BPS << PCF8833_ST_PIXELFMT_SHIFT)
  113. # define PCF8833_ST_PIXELFMT_12BPS (PCF8833_FMT_12BPS << PCF8833_ST_PIXELFMT_SHIFT)
  114. # define PCF8833_ST_PIXELFMT_16BPS (PCF8833_FMT_16BPS << PCF8833_ST_PIXELFMT_SHIFT)
  115. /* Byte 3: D15 -- D13 D12 D11 D10 D9 --- */
  116. #define PCF8833_ST_TEARING (1 << 1) /* Bit 1: D9 - Tearing effect on */
  117. #define PCF8833_ST_DISPLAYON (1 << 2) /* Bit 2: D10 - Display on */
  118. #define PCF8833_ST_PIXELSOFF (1 << 3) /* Bit 3: D11 - All pixels off */
  119. #define PCF8833_ST_PIXELSON (1 << 4) /* Bit 4: D12 - All pixels on */
  120. #define PCF8833_ST_INV (1 << 5) /* Bit 5: D13 - Display inversion */
  121. #define PCF8833_ST_VSCROLL (1 << 7) /* Bit 6: D15 - Vertical scroll mode */
  122. /* Byte 4: All zero */
  123. #endif /* __DRIVERS_LCD_PCF8833_H */